Dual-channel 20Mbps bit synchronizer and PCM decommutator PCI card
The GTS/DEC/005 reconstructs a serial PCM data stream from a source that has been corrupted by noise, phase jitter, amplitude modulation, or base line variations. The all-digital design utilizes two independent, programmable matched filters and Phase Locked Loops (PLLs) to track deviations in the bit-rate of the received signals.
The GTS/DEC/005 reconstructs a serial PCM data stream from a source that has been corrupted by noise, phase jitter, amplitude modulation, or base line variations. The all-digital design utilizes two independent, programmable matched filters and Phase Locked Loops (PLLs) to track deviations in the bit-rate of the received signals.
The recovered data is then decommutated into frames. Each minor frame can be tagged with time from an IRIG-B source to an accuracy of 1µs.
First of two bit synchronizers and PCM decommutator channels